02. 11. 11
Cray XE6 Optimization Workshop
HLRS, Seminar room, Allmandring 30, 70569 Stuttgart.
2011, Wednesday, November 2, 9:00 - Friday, November 4, 16:30
Abstract: HLRS installs a first Cray XE6 system with AMD Interlagos processors and a performance of 1 PFlop/s. We strongly encourage you to port your applications to the new architecture as early as possible. To support such first effort we invite current and future users to participate in special Cray XE6 Optimization Workshops. With this course, we will give all necessary information to move applications from the current NEC SX-9, the Nehalem cluster, or other systems to the upcoming Petaflop system. The Cray XE6 installed in 2011 will provide our users with a new level of performance. To harvest this potential will require all our efforts. We are looking forward to working with our users on these opportunities.
HLRS course number and page: 2011-XE6-2.
This course is part of the series of Parallel Programming and Language Courses 2011.
A list of all HLRS training (including also external HLRS courses) can be found here.