NEC SX-ACE - Vectorization and Optimization

Enterprises & SME Research & Science
NEC SX-ACE - Vectorization and Optimization

Abstract

In spring 2015, HLRS installed a next generation vector computer, a NEC SX-ACE. The participants learn about the configuration of the NEC SX-ACE system at HLRS and how to use this cluster of vectorizing shared memory nodes. One focus is an introduction in vectorization. More experienced users can learn how to optimize programs based on performance measurements. Additional topics are I/O and the optimization of application programs. The first day presents an introduction to the NEC SX architecture and vectorization. The second day morning is focused on usage aspects and the differences between the predecessor system (NEC SX-9) and the new NEC SX-ACE. The afternoon is dedicated to hands-on sessions.

Separate registration of individual days is possible. Participants are encouraged to prepare their own applications for use in the hands-on session. Participants familiar with SX vector computers may wish to register only for Day 2.

General Information

Agenda

Tuesday
     9:00 -   9:30 Local registration 
     9:30 - 13:00 Introduction to the NEC SX architecture and vectorization
   13:00 - 14:00 Lunch break
   14:00 - 18:00 Introduction to the NEC SX architecture and vectorization (continued)
Wednesday
     9:00 - 13:00 SX-ACE: new features, usage at HLRS
   13:00 - 14:00 Lunch break
   14:00 - 16:30 Hands-on session

Language

English (if required)

Teacher

Jens-Olaf Beismann, Holger Berger (NEC)

Registration

via online registration form.

Please book Course 2015-NEC, "ALL DAYS" if you want to book all parts.

Deadline

for registration is April 29, 2015 (extended deadline).

Fee

Members of German universities and public research institutes: none. 
Members of other universities and public research institutes: 120 EUR.  
Others: 400 EUR.
(includes food and drink at coffee breaks, will be collected on the first day of the course, cash only)

Prerequisites

Programming experience in C or Fortran, some knowledge about parallel programming

PRACE PATC and bwHPC-C5

HLRS is part of the Gauss Centre for Supercomputing (GCS), which is one of the six PRACE Advanced Training Centres (PATCs) that started in Feb. 2012.
HLRS is also member of the Baden-Württemberg initiative bwHPC-C5.
This course is provided within the framework of the bwHPC-C5 user Support. This course is not part of the PATC curriculum and is not sponsored by the PATC program.

Links

Additional information can be found, e.g., at NEC SX-ACE at HLRS

Cancelation Policy

If you cannot come to the course, please send an email to the organizer as soon as possible. This would allow us to accept additional participants from the waiting-list. There is no cancelation fee.
NO-SHOW: Registered persons that do not cancel and do not show up without any reasons are blocked for the next year on any of our workshops (because it is too expensive to produce unused copies of the slides for them).

Handouts

Each participant will get a paper copy of all slides.
The handouts are also available as zip archive: 2015-NEC-SX-ACE-course-handouts.zip

Further courses

http://www.hlrs.de/training/course-list

Shortcut-URL of this course:

http://www.hlrs.de/training/2015/NEC

CONTACT

Rolf Rabenseifner
phone 0711 685 65530
rabenseifner@hlrs.de

Joerg Hertzer
phone 0711 685 65932
hertzer@hlrs.de