Mont-Blanc 3

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The Mont-Blanc project aims to design a new type of computer architecture capable of setting future HPC standards, built from energy-efficient solutions used in embedded and mobile devices.

The project has been running since 2011 and was extended in 2013 (Mont Blanc 2) and 2015 (Mont Blanc 3), respectively.

In particular, Mont Blanc 3 will enable further development of the OmpSs programming model to automatically exploit multiple cluster nodes, transparent application checkpointing for fault-tolerance, support for ARMv8 64-bit processors, and the initial design of the Mont-Blanc Exascale architecture.

HLRS contribution to the project is twofold. Firstly, we will participate in the development of the programming model, in particular combining MPI and OmpSs into a hybrid, task-aware MPI/OmpSs. This will allow to overlap MPI communication with computation with minimal effort for the application programmer. Secondly, HLRS will contribute to the evaluation of the programming model and the architecture by porting a representative scientific application.


01. October 2015 -
31. December 2018


EC H2020


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