Plateauing scaling laws lead the HPC community in- to an era of new paradigms and increasingly heterogeneous architectures. Specialized accelerators, co-processors, and, e.g., neuromorphic systems potentially offer significant speed-ups and energy savings, but currently at the cost of maturity. HLRS organizes the Future Computing Workshop to help bridge the gaps between hardware vendors, research software developers, and domain-specific researchers. We evaluate the current state of HPC and its prospects, particularly for x86, GPUs, and ARM-based architectures. Computing paradigms that may succeed them include machines from all technologies. However, we emphasize medium-term scenarios.
HLRS intends this workshop to offer a platform for discussions, networking, and exploring potential projects and collaborations. We want to serve the community and stay ahead.
Target Audience
Researchers, architects, and developers from national labs, academia, and industry who are involved in HPC system design, software development, and application deployment.
- Researchers focused on the software ecosystem working to adapt and optimize for emerging and heterogeneous hardware. Among the software ecosystem are programming models, compilers, runtime systems, performance tools, and domain-specific libraries.
- Hardware Vendors, their architects and technologists from companies developing processors, accelerators, and other components who are looking to engage with the HPC community.
- Leaders, researchers, and practitioners from national computing facilities are responsible for evaluating, deploying, and maintaining next-generation systems, with a critical interest in long-term sustainability, performance portability, and user support.
Program
We organize a three-day on-site event in Stuttgart, featuring talks, breaks, lunch, and dinner, providing an open platform for discussions.
- Program, registration and further information coming in time -
