Introduction to NEC SX-Aurora TSUBASA vector platform

This two day training will introduce the SX-Aurora TSUBASA installation at HLRS. The architecture will be presented and compared to other architectures and SX-ACE, an introduction to programming of vector CPUs will be given and vectorization will be discussed on examples. Usage of the system at HLRS will be demonstrated. Participants can apply for test accounts to test their own code on the SX-Aurora TSUBASA after the course.

Veranstaltungsort

Online course
Organizer: HLRS, University of Stuttgart, Germany

Veranstaltungsbeginn

15. Jun 2023
08:45

Verstaltungsende

16. Jun 2023
13:30

Sprache

Englisch

Einstiegslevel

Basis

Themenbereiche

Paralleles Programmieren

Themen

Künstliche Intelligenz

Big Data

Code-Optimierung

Deep Learning

Maschinelles Lernen

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Prerequisites and content levels

Prerequisites

Knowledge of one C/C++/Fortran.

Content levels

Intermediate: 8 hours.

Learn more about course curricula and content levels.

Instructors

Holger Berger, Erich Focht, and Patrick Lipka from NEC Deutschland GmbH

Learning outcomes

After this course, participants will: 

  • be familiar with the vector architecture
  • have experience with compilers, performance analysis and debugging for the SX-Aurora TSUBASA

Agenda

All times are local times in (CEST, Berlin). The preliminary agenda is as follows.

Day 1

08:45 - 09:00 Drop in to Zoom
09:00 - 13:30 Lectures and exercises

Day 2

08:45 - 09:00 Drop in to Zoom
09:00 - 13:30 Lectures and exercises (Advanced topics, hybrid MPI)

Topics on the two days include

  • architecture overview and comparison
  • what is vectorization
  • compilers and options
  • performance tools
  • debugging
  • listing files
  • loop optimization techniques
  • batch system usage
  • hybrid MPI

Registration information

Register via the button at the top of this page.
We encourage you to register to the waiting list if the course is full. Places might become available.

Registration closes on May 31, 2023 (extended registration phase).

Late registrations after that date are still possible according to the course capacity, possibly with reduced quality of service.

Fees

This course is free of charge.

Contact

Tobias Haas phone 0711 685 87223, tobias.haas(at)hlrs.de
Khatuna Kakhiani phone 0711 685 65796, kakhiani(at)hlrs.de

HLRS Training Collaborations in HPC

HLRS is part of the Gauss Centre for Supercomputing (GCS), together with JSC in Jülich and LRZ in Garching near Munich. EuroCC@GCS is the German National Competence Centre (NCC) for High-Performance Computing. HLRS is also a member of the Baden-Württemberg initiative bwHPC.

Further courses

See the training overview and the Supercomputing Academy pages.

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