Node-Level Performance Engineering

This course covers performance engineering approaches on the compute node level. Even application developers who are fluent in OpenMP and MPI often lack a good grasp of how much performance could at best be achieved by their code. This is because parallelism takes us only half the way to good performance. Even worse, slow serial code tends to scale very well, hiding the fact that resources are wasted. This course conveys the required knowledge to develop a thorough understanding of the interactions between software and hardware. This process must start at the core, socket, and node level, where the code gets executed that does the actual computational work. We introduce the basic architectural features and bottlenecks of modern processors and compute nodes. Pipelining, SIMD, superscalarity, caches, memory interfaces, ccNUMA, etc., are covered. A cornerstone of node-level performance analysis is the Roofline model, which is introduced in due detail and applied to various examples from computational science. We also show how simple software tools can be used to acquire knowledge about the system, run code in a reproducible way, and validate hypotheses about resource consumption. Finally, once the architectural requirements of a code are understood and correlated with performance measurements, the potential benefit of code changes can often be predicted, replacing hope-for-the-best optimizations by a scientific process.

This course provides - via lectures, demos, and hands-on labs - scientific training in Computational Science, and in addition, the scientific exchange of the participants among themselves.



Online course
Organizer: HLRS, University of Stuttgart, Germany


27. Jun 2023


30. Jun 2023






Performance-Optimierung & Debugging

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Prerequisites and content levels

  • Familiarity with Linux and Linux editors is recommended.
  • Basics/principles of programming in C or Fortran and basic OpeMP.
Content levels:
  • Intermediate: 8 hours 15 minutes
  • Advanced: 8 hours 15 minutes
  • Community: 2 hours 45 minutes

Learn more about course curricula and content levels.


Dr. habil. Georg Hager and Dr.-Ing. Jan Eitzinger  (NHR@FAU, Uni. Erlangen)
Bert Wesarg (ZIH Uni. Dresden) for the tools-day


The agenda can be downloaded here.

Day 1

  • 08:45   Enter the Zoom meeting
  • 09:00   Welcome – Intro
  • 09:30   Computer architecture for software developers part 1
  • 10:15   Coffee break
  • 10:30   Computer architecture for software developers part 2
  • 10:45   Hands-on: Divide benchmark
  • 11:30   Tools: Topology and affinity, frequency
  • 12:00   Lunch
  • 13:00   Hands-On: topology, affinity
  • 13:45   Introduction to the Roofline Model
  • 15:00   Coffee break
  • 15:15   Quiz/Q&A/open end

Day 2

  • 08:45   Enter the Zoom meeting
  • 09:00   Tools: Performance counters
  • 09:45   Hands-on: performance counters and memory bandwidth
  • 10:30   Coffee break
  • 10:45   Roofline case study: stencils
  • 11:30   Performance Engineering: Basic skills
  • 12:15   Lunch
  • 13:15   Hands-on: Dense matrix-vector multiplication (I)
  • 13:45   Optimal use of parallel resources:  ccNUMA
  • 14:15   Hands-on: Dense matrix-vector multiplication (II)
  • 14:45   Roofline case study: Tall & skinny matrix-matrix multiplication
  • 15:15   Coffee break
  • 15:30   Quiz/Q&A/open end

Day 3

  • 08:45   Enter the Zoom meeting
  • 10:00   Hands-on: SIMD in MiniMD
  • 11:00   Coffee break
  • 11:15   Roofline case study: Sparse matrix-vector multiplication
  • 12:15   Lunch
  • 13:15   Hands-on: Matrix-free CG solver
  • 14:45   Coffee break
  • 15:00   The ECM performance model
  • 16:00   Quiz/Q&A/open end

Day 4 (Tools Day)

  • 08:45   Enter the Zoom meeting
  • 09:00   Performance engineering from the application point of view
  • 09:30   Monitoring with Score-P
  • 09:45   Hands-on: MiniMD with Score-P
  • 10:15   Coffee break
  • 10:30   Profile exploration and measurement scoring
  • 10:45   Trace exploration with Vampir
  • 11:15   Coffee break
  • 11:30   Hands-on: Load imbalance: SpMV
  • 12:15   Wrap-up


Detailed Program


  • Basic architecture of multicore systems: threads, cores, caches, sockets, memory
  • The important role of system topology

Tools topology and affinity in multicore environments

  • Overview
  • likwid-topology and likwid-pin

Roofline model: basics

  • Model assumptions and construction
  • Simple examples
  • Limitations of the Roofline model

Tools: hardware performance counters

  • Why hardware performance counters?
  • likwid-perfctr
  • Applications

Roofline case studies

  • Stencil algorithms
  • Tall & Skinny dense matrix-matrix multiplication
  • Sparse matrix-vector multiplication

Basic skills in performance engineering

Optimal use of parallel resources

  • Single Instruction Multiple Data (SIMD)
  • Cache-coherent Non-Uniform Memory Architecture (ccNUMA)

Extending Roofline: The ECM performance model


Before the course, the course material and an updated agenda will be available here.

An older version of this course with most of the material (including the audio information) can also be viewed in the online self-study materials.


Register via the button at the top of this page.
We encourage you to register to the waiting list if the course is full. Places might become available.

Registration due to June 2, 2023.
Late registrations after this date are still possible according to the course capacity, maybe with reduced quality of the service.


  • Students without master’s degree or equivalent: 30 Euro
  • PhD students or employees at a German university or public research institute: 60 Euro
  • PhD students or employees at a university or public research institute in an EU, EU-associated or PRACE country other than Germany: 120 Euro
  • PhD students or employees at a university or public research institute outside of EU, EU-associated or PRACE countries: 240 Euro
  • Other participants, e.g., from industry, other public service providers, or government: 600 Euro


Link to the EU and EU-associated (Horizon Europe), and PRACE countries.

Our course fees include coffee breaks (in classroom courses only).


Lucienne Dettki, phone 0711 685 63894, dettki(at)

HLRS Training Collaborations in HPC

HLRS is part of the Gauss Centre for Supercomputing (GCS), together with JSC in Jülich and LRZ in Garching near Munich. EuroCC@GCS is the German National Competence Centre (NCC) for High-Performance Computing. HLRS is also a member of the Baden-Württemberg initiative bwHPC.

This course is provided within the framework of the bwHPC training program.

Further courses

See the training overview and the Supercomputing Academy pages.